Energy reduction in VLSI computation modules: an information-theoretic approach

We consider the problem of reduction of computation cost by introducing redundancy in the number of ports as well as in the input and output sequences of computation modules. Using our formulation, the classical “communication scenario” is the case when a computation module has to recompute the input sequence at a different location or time with high fidelity and low bit-error rates. We then consider communication with different computational cost objective than that given by bit-error rate. An example is communication over deep submicrometer very-large scale integration (VLSI) buses where the expected energy consumption per communicated information bit is the cost of computation. We treat this scenario using tools from information theory and establish fundamental bounds on the achievable expected energy consumption per bit in deep submicrometer VLSI buses as a function of their utilization. Some of our results also shed light on coding schemes that achieve these bounds. We then prove that the best tradeoff between the expected energy consumption per bit and bus utilization can be achieved using codes constructed from typical sequences of Markov stationary ergodic processes. We use this observation to give a closed-form expression for the best tradeoff between the expected energy consumption per bit and the utilization of the bus. This expression, in principle, can be computed using standard numerical methods. The methodology developed here naturally extends to more general computation scenarios.